Welcome![Sign In][Sign Up]
Location:
Search - sdram lattice

Search list

[Embeded-SCM Developsdram_vhdl_lattice.rar

Description: lattice sdram 控制器VHDL源代码
Platform: | Size: 179773 | Author: | Hits:

[Other resource标准SDR SDRAM控制器参考设计_verilog_lattice

Description: 标准SDR SDRAM控制器参考设计,Lattice提供的verilog源代码-standard SDR SDRAM controller reference design, the Lattice Verilog source code
Platform: | Size: 204299 | Author: 陈旭 | Hits:

[Otherlattice_sdram_source_code

Description: lattice sdram 控制器的源码,VHDL语言编码 包括仿真文件-lattice sdram controller source code, including VHDL simulation document coding
Platform: | Size: 32502 | Author: dido wang | Hits:

[VHDL-FPGA-Verilogsdram_vhdl_lattice

Description: lattice sdram 控制器VHDL源代码-Sound code of Lattice Sdram Controller based on VHDL
Platform: | Size: 180224 | Author: 刘汉忠 | Hits:

[VHDL-FPGA-Verilog标准SDR SDRAM控制器参考设计_verilog_lattice

Description: 标准SDR SDRAM控制器参考设计,Lattice提供的verilog源代码-standard SDR SDRAM controller reference design, the Lattice Verilog source code
Platform: | Size: 203776 | Author: 陈旭 | Hits:

[VHDL-FPGA-Verilogsdram_vhdl_lattice

Description: sdram_vhdl_lattice,程序已经调通过了,欢迎使用,多多交流哈-sdram_vhdl_lattice, procedures have been transferred through the use of welcome, many exchanges Kazakhstan
Platform: | Size: 181248 | Author: 蒋谦 | Hits:

[VHDL-FPGA-VerilogDDR_SDRAM_Controller

Description: DDR RAM控制器的VHDL源码,实现平台是Lattice FPGA,功能验证通过-DDR RAM controller VHDL source code, achieving the platform of Lattice FPGA, functional verification through
Platform: | Size: 677888 | Author: 钟方 | Hits:

[Otherlattice_sdram_source_code

Description: lattice sdram 控制器的源码,VHDL语言编码 包括仿真文件-lattice sdram controller source code, including VHDL simulation document coding
Platform: | Size: 31744 | Author: dido wang | Hits:

[Compress-Decompress algrithmsDDR2_sdram

Description: DDR2 的控制器,它是由LATTICE的编译器生成。-DDR2 controller, it is by the compiler-generated LATTICE.
Platform: | Size: 966656 | Author: 李国 | Hits:

[VHDL-FPGA-Verilogref-sdr-sdram-vhdl

Description: 标准SDR SDRAM控制器参考设计_verilog_lattice\sdr_ctrl.v-Standard SDR SDRAM Controller Reference Design _verilog_latticesdr_ctrl.v
Platform: | Size: 776192 | Author: 王廷龙 | Hits:

[Othersdram_vhdl_lattice

Description: sdram接口的vhdl实现,适用于lattice的FPGA,内含状态机和各个模块的具体实现-SDRAM interface VHDL realization lattice applied to the FPGA, containing the state machine and the concrete realization of each module
Platform: | Size: 181248 | Author: shroy | Hits:

[VHDL-FPGA-VerilogDDR_SDRAM

Description: ddr sdram 的控制程序,lattice的,比较好用的,大家-ddr sdram control program, lattice, and relatively easy to use, and we look
Platform: | Size: 8483840 | Author: 熊熊 | Hits:

[VHDL-FPGA-VerilogDDRSDRAM_controller

Description: ddr sdram控制器,lattice器件的参考设计,比较详细-ddr sdram controller, lattice components of the reference design, very detailed
Platform: | Size: 693248 | Author: | Hits:

[VHDL-FPGA-Verilog标准SDR SDRAM控制器参考设计,Lattice提供

Description: 说明: SDR SDRAM 控制器 来自lattice 已经分析代码可用!大家可以参考修改,形成自己的实例(Description: SDR SDRAM controller from lattice has been analyzed code available, we can refer to modify, to form their own examples)
Platform: | Size: 17408 | Author: modelsim | Hits:

CodeBus www.codebus.net